29 بهمن 1404
سجاد نژادحسن

سجاد نژادحسن

مرتبه علمی: استادیار
نشانی: دانشکده مهندسی سیستم های هوشمند و علوم داده - گروه مهندسی برق
تحصیلات: دکترای تخصصی / مهندسی برق
تلفن: 00
دانشکده: دانشکده مهندسی سیستم های هوشمند و علوم داده

مشخصات پژوهش

عنوان PVT-compensated low voltage LNA based on variable current source for low power applications
نوع پژوهش مقالات در نشریات
کلیدواژه‌ها
Low noise amplifier (LNA), PVT compensation, Low power, Sub-threshold amplifier
مجله AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS
شناسه DOI 10.1016/j.aeue.2021.154042
پژوهشگران سجاد نژادحسن (نفر اول) ، فاطمه زاهری (نفر دوم) ، ابراهیم عبیری (نفر سوم) ، محمدرضا صالحی (نفر چهارم)

چکیده

In this paper, a new compensation technique for the low noise amplifier (LNA) with the high capability and efficiency for low power applications is proposed. The supply voltage and bias of the LNA are near the sub-threshold voltage, which has excellent effect on reducing power consumption. At this voltage level, the gain decreases and the various circuit parameters become extremely sensitive to process, voltage and temperature (PVT) changes. To overcome the problem, a compensating circuit with variable current source to control the LNA bias voltage is used. The output of the compensator circuit is adjusted according to changes in temperature, voltage and five process corners, and produces a variable voltage. The temperature compensator consists of two current sources that produce a current proportional to temperature changes. Regarding process and voltage compensator, according to the state created in the circuit, the appropriate amount of current is injected through the output and finally stabilizes the main parameters of the LNA circuit. In LNA circuit, for proper performance at supply voltage near the sub-threshold and attaining the gain improvement, forward body bias and gm-boosting techniques are employed, respectively. The LNA circuit along with the PVT compensator at supply voltage of 0.35V, consumes about 567µW power consumption that here 91µW is caused by the PVT compensator circuit. In the proposed circuit, the rate of noise figure (NF) and gain (S21) changes compared to temperature changes in the five corners have decreased by 4.3 and 12.1 times versus LNA with constant bias, respectively. In this case, with 20% changes of VDD, NF and S21 changes decreased by 23 and 11.35 times, respectively. The results are provided by Cadence software using 65nm CMOS technology.