March 19, 2026
Sajad Nejadhasan

Sajad Nejadhasan

Academic Rank: Assistant professor
Address: Faculty of Intelligent Systems and Data Science, 1st floor
Degree: Ph.D in Electrical engineering
Phone: 00
Faculty: Faculty of Intelligent Systems and Data Science

Research

Title An Optimized Regulator with 290 nA Quiescent Current and 115μW Power Consumption for UHF RFID Tags Using TLBO Algorithm
Type Article
Keywords
TLBO algorithm, RFID, Regulator, Neural network, Power consumption
Journal WIRELESS PERSONAL COMMUNICATIONS
DOI https://doi.org/10.1007/s11277-015-2507-y
Researchers Ebrahim Abiri (First researcher) , Rezvan Dastanian (Second researcher) , Mohammad Reza Salehi (Third researcher) , Sajad Nejadhasan (Fourth researcher)

Abstract

In this paper a low power and low output ripple regulator is designed with teaching-learning-based optimization (TLBO) for radio frequency identification applications. In order to decrease the power consumption the voltage of regulator sub-blocks is supplied from elementary stages. In the proposed operational amplifier employed to the regulator, adaptive biasing is used and bandgap reference of the regulator is totally designed by MOSFET. To optimize the proposed regulator after modeling the regulator with the help of neural network, TLBO algorithm is used. The outputs of TLBO are output voltage, ripple value and power consumption. By using this algorithm the output voltage is 0.8 V with 2.78 mV ripple and 115μW power consumption. Also the quiescent current of this design is decreased to 290 nA. The chip area of the layout design in Cadence software is about 0.00124mm2. The operation frequency of this circuit is 960 MHz and the simulation is done in 0.18μm CMOS technology.