A low power and low LIR regulator for passive RFID tag in 0.18 μm CMOS technology, By Sajad Nejadhasan

Research

Title	A low power and low LIR regulator for passive RFID tag in 0.18 μm CMOS technology
Type	Article
Keywords	Bandgap reference, LIR, Low power consumption, OPA, Regulator, RFID
Journal	IETE JOURNAL OF RESEARCH
DOI	https://doi.org/10.1080/03772063.2015.1021390
Researchers	Sajad Nejadhasan (First researcher) , Ebrahim Abiri (Second researcher) , Rezvan Dastanian (Third researcher) , Mohammad Reza Salehi (Fourth researcher)

Abstract

This paper proposes a low power and low output ripple regulator for radio frequency identification tags. The inner blocks of regulator is supplied from elementary stages output of rectifier. The proposed operational amplifier works on AB class and its bias is in adaptive biasing form. The bandgap reference and sampling voltage resistors used in this paper are completely designed with transistors which culminate in low power dissipation. The regulator output voltage is 1.07 V, while the output ripple is ±1.1 mV. The value of line regulation, power supply rejection ratio, and regulator efficiency are 5.5 mV/V, 45.2 dB, and 71.3%, respectively. A 111 µW power consumption has been calculated with 20 KΩ load. The simulation is done with the help of Cadence software in 0.18 µm CMOS technology, while its operational frequency is 960 MHz. The layout of the proposed regulator is 0.00125 mm2.