This paper presents a new approach for design of a digital phase locked loop. By employing a digitally controlled oscillator (DCO) and a time-to-digital converter (TDC), theloop filter of a DPLL becomes all-digital. Instead of designing the loop filter by digitizing a continuous-time loop response ashas been commonly done, more sophisticated control schemes can be employed. In this paper, we proposed to design feedback loop filter by first modeling the DCO and TDC as appropriatemodel in transfer function form. Then by employing model predictive control (MPC) approach for design of loop filterinstead of existing conventional loop filter generate optimal signal that accurately account for the transport delay in thedigital feedback system. Using the proposed approach loop filter can overcome latency problem that digital feedback loops suffer and imposes limitation on loop bandwidth and even canmake instability on loop. Simulation results by MATLAB confirm ability of the proposed design and shows it is suitable for digital phase locked loop